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Course contents

  • How to Use This Puzzle Bank
  • SystemVerilog Language Puzzles25
  • Difficulty Guide
  • Full Topic Map
  • Interview-Day Tips
  • Study Route: One Week Before the Interview
  • Study Route: Two Weeks
  • Study Route: Four Weeks (Full Course)4
  • OOP & Testbench Puzzles25
  • Concurrency & Timing Puzzles25
  • Randomization & Constraint Puzzles25
  • SVA Assertion Puzzles25
  • Functional Coverage Puzzles25
  • Logic & Aptitude Puzzles25
  • Scenario & Debug Puzzles25
  • UVM Testbench Puzzles25
    • UVM Phases and Objections
      • Which Way Do the Phases Walk the Tree
      • Drain Time After the Last Drop
      • PASSED Banner Printed Before the Error
      • Derived build_phase Without super
      • phase_ready_to_end Never Extends
      • Creating a Component After Build
    • Factory and config_db
    • Sequences and Sequencers
    • Analysis, Scoreboards and RAL
    • UVM Testbench Puzzles: Tricky Q&A
  • Clock, Reset & CDC Puzzles25
  • Bus and Interface Protocol Puzzles25
  • Interview Prep: Puzzle Rounds7
  • DV Puzzle Cheatsheet
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←UVM Phases and Objections
  1. Topics
  2. DV Interview Puzzles
  3. UVM Testbench Puzzles
  4. UVM Phases and Objections
  5. Drain Time After the Last Drop
On this page

    VLSI DV Interview PuzzlesAll levels

    Drain Time After the Last Drop

    UVM 1.2, timescale 1ns. The test raises an objection, sets a drain time of 50, runs 100 ns of stimulus and drops. A monitor in the same environment prints every 40 ns. At which time does run_phase end, and which monitor lines appear in the log?

    Puzzle

    Difficulty: Medium · Puzzle 2 of 6 · Topic: UVM Phases and Objections

    UVM 1.2, timescale 1ns. The test raises an objection, sets a drain time of 50, runs 100 ns of stimulus and drops. A monitor in the same environment prints every 40 ns. At which time does run_phase end, and which monitor lines appear in the log?

    Code

    design.sv
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    class my_test extends uvm_test;
      `uvm_component_utils(my_test)
      function new(string name, uvm_component parent); super.new(name, parent); endfunction
      task run_phase(uvm_phase phase);
        phase.raise_objection(this);
        phase.phase_done.set_drain_time(this, 50);
        #100;
        phase.drop_objection(this);
      endtask
    endclass
    
    class my_mon extends uvm_monitor;
      `uvm_component_utils(my_mon)
      function new(string name, uvm_component parent); super.new(name, parent); endfunction
      task run_phase(uvm_phase phase);
        forever begin
          #40;
          `uvm_info("MON", "alive", UVM_LOW)
        end
      endtask
    endclass

    Hint

    The drop at 100 ns does not end the phase by itself. What does the drain time add, and what happens to forever loops when the phase ends?

    Step-by-step solution

    Diagram
    1) The last objection is dropped at 100 ns, so the objection count reaches zero then.
    2) The 50 ns drain time delays the end of the phase: the phase may only end at 100 + 50 = 150 ns, provided nobody raises an objection again meanwhile.
    3) The monitor's forever loop keeps running during the drain, so it still prints at 40, 80 and 120 ns.
    4) At 150 ns the run phase ends and the monitor's thread is killed, so no line appears at 160 ns.

    Answer

    Answer: run_phase ends at 150 ns; the monitor prints at 40, 80 and 120 ns and not at 160 ns.

    How this was checked

    Checked by running the code in Verilator 5; the printed output supports the answer above. Hand-written model of the documented UVM 1.2 behaviour in plain SystemVerilog (Verilator), not the UVM library: an objection class that waits the drain time after the count reaches zero, then ends the phase and kills the monitor loop.

    Why candidates get it wrong

    The phase does not end at the drop (100 ns) and the monitor is not silent during the drain; it also is not allowed to continue past the end, because a phase ending kills any run_phase thread still running, including forever loops.

    Interviewer follow-up

    If a scoreboard raised a new objection at 130 ns (inside the drain), what happens? Model answer: the count is no longer zero, so the pending end is cancelled and the phase stays open; when that objection is dropped the drain time is applied again from that drop, which is why drain time is per last-drop, not a fixed extension.

    Related topics

    • Back to UVM Phases and Objections

    • UVM Testbench Puzzles section

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    See also

    • Derived build_phase Without super
    • phase_ready_to_end Never Extends
    • Creating a Component After Build