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Course contents

  • RTL Foundations36
  • Combinational Design25
  • Sequential Design27
  • FSM & Control27
  • Timing & Clocking39
  • Reset & CDC34
  • Memory & Buses57
  • Advanced RTL28
  • Senior & Interview76
    • Low-Power RTL Hub
    • DFT and Scan Hub
    • Physical Awareness Hub
    • Waveform Debug Hub
    • STA and ECO Hub
    • RTL-to-Implementation Closure
    • DFT-Ready RTL
    • Capstone: Resilient Streaming Peripheral
    • Principal Design Review
    • Senior RTL Interview Questions & Model Answers
      • Interview: Combinational and Arithmetic
      • Interview: Sequential and Pipelines
      • Interview: FSM and Control
      • Interview: Timing and STA
      • Interview: CDC and Reset
      • Interview: Memories and Buses
      • Interview: Low-Power Design
      • Interview: Debug and ECO
      • Interview: Coding and Whiteboard
        • Whiteboard: a synchronous FIFO
        • Whiteboard: a priority mux
        • An RTL review in 30 minutes
        • Framing area, speed and power trade-offs
        • What senior answers sound like
  • Glossary and Notation
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‹Senior RTL Interview Questions & Model Answers
  1. Topics
  2. RTL Design
  3. Senior & Interview
  4. Senior RTL Interview Questions & Model Answers
  5. Interview: Coding and Whiteboard

Part 9 · Senior · Senior Prep

Interview: Coding and Whiteboard

Five senior whiteboard drills: a sync FIFO, a priority mux, a 30-minute review, trade-off framing, and senior signals.

  • 5topics
  • 5lessons

Topics in this section

  1. 1Whiteboard: a synchronous FIFO1 lesson
  2. 2Whiteboard: a priority mux1 lesson
  3. 3An RTL review in 30 minutes1 lesson
  4. 4Framing area, speed and power trade-offs1 lesson
  5. 5What senior answers sound like1 lesson
On this page

    Whiteboard rounds test working RTL habits under time pressure. Each lesson below is one realistic question with a model answer, follow-ups, and the mistakes that separate strong candidates.

    Lessons in this topic

    5 lessons, about 25 min

    1. 1Whiteboard: a synchronous FIFOYou can write a parameterised synchronous FIFO with an occupancy counter, guarded push and pop, and correct behaviour when both arrive together.5 min
    2. 2Whiteboard: a priority muxYou can write a lowest-index-wins priority mux with a valid flag, and derive grant and data from one decision.4 min
    3. 3An RTL review in 30 minutesYou can run a timeboxed review in a fixed pass order, report each finding with its trigger and fix, and say what was skipped.6 min
    4. 4Framing area, speed and power trade-offsYou can state the product priority, compare two or three options by metric direction, pick one, and say what new fact would flip the choice.5 min
    5. 5What senior answers sound likeYou can structure any answer as mechanism, trade-offs and evidence, and say how you would settle something you do not know.5 min
    Check yourself An interviewer asks for a FIFO and a reviewer asks for a FIFO. What differs?

    The interviewer grades the reasoning path: interface first, flags before pointers, guards before optimization, and a test plan. The reviewer grades the same habits in the finished code.

    Interview

    Strong whiteboard answers follow one shape: state the interface, name the invariant, write the smallest correct RTL, then describe the testbench that would prove it.

    Revision sheet

    The whole topic on one page, taken from each lesson's Remember box. Read it before an interview, or print it.

    Whiteboard: a synchronous FIFO

    • State the interface first. Occupancy equals accepted pushes minus accepted pops since reset.

    • Accept a push only when not full and a pop only when not empty. When full, a simultaneous pop is accepted and the push is refused.

    • Keep a counter, or add one pointer bit, to tell full from empty. Guard DEPTH = 1 when computing the pointer width.

    Rule of thumb: never derive both flags from bare pointer equality.

    Whiteboard: a priority mux

    • Always carry a valid flag with the index. Valid means some request is active.

    • A loop from the high index down lets the lowest active request overwrite last, so it wins.

    • Select the data in the same block as the index, so grant and data cannot disagree.

    Rule of thumb: one priority decision drives every output.

    An RTL review in 30 minutes

    • Work outside in: interfaces, control, reset and clocks, datapath timing, verification hooks.

    • Report one line per defect: location, trigger condition and consequence, then the fix and the check that closes it.

    • Flag only what changes function, timing or debuggability, and say the rest was skimmed.

    Rule of thumb: a finding without a trigger is only a suspicion.

    Framing area, speed and power trade-offs

    • State which of area, speed or power wins when they conflict, before offering options.

    • Directions are hypotheses to measure, under the same workload, target and corner. Do not quote gains from memory.

    • More pipeline cycles do not always raise elapsed latency. A shorter period can recover it if stages were unbalanced.

    Rule of thumb: priority first, options second, pick third, then name what would change it.

    What senior answers sound like

    • Order: the one-sentence mechanism, then the options and the pick, then what would prove it.

    • Evidence is the sharpest separator. Name trade-offs and evidence together.

    • Say plainly where your knowledge ends, reason from the mechanism, and propose the check that settles the rest.

    Rule of thumb: a verdict without a trigger carries no weight.

    Practise it

    • Mini project: the capstone: a resilient streaming peripheral, stage by stage

    • Practice question: Synchronous FIFO with full and empty flags

    • Practice question: Synchronous FIFO RTL design (blocking on full and empty)

    • Code lab: Synchronous FIFO (4 entries)

    • Practice question: Priority encoder with parameterised width and valid output

    • Code lab: 4:2 priority encoder

    • Interview: run a mock interview on this topic

    PreviousNext: Whiteboard: a synchronous FIFO

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    See also

    • Interview: Combinational and Arithmetic
    • Interview: Sequential and Pipelines
    • Interview: FSM and Control