Day 1

Functional Coverage Puzzles: Coverage Options Puzzles; Functional Coverage Puzzles: Coverage Closure and Sampling Timing Puzzles

cov-opt-001: auto_bin_max and at_least together (M); cov-opt-002: Weighted aggregate coverage math (M); cov-opt-003: Instance coverage, type coverage and merge_instances (M); cov-opt-004: option.at_least per instance with averaged type coverage (M); cov-opt-005: auto_bin_max is ignored once bins are explicit (M); cov-opt-006: option.weight zero removes metric influence (E); cov-close-001: Sampling region off-by-one on state bins (M); cov-close-002: Unreachable bin from stimulus constraints (E); cov-close-003: Sampling on a derived clock sees the updated value (M); cov-close-004: Reset-time samples filtered by iff (M); cov-close-005: Unreachable cross tuple from protocol rules (M); cov-close-006: at_least threshold causes closure plateau (M)

Day 2

Logic & Aptitude Puzzles: Classic Brain Teasers; Logic & Aptitude Puzzles: Probability Puzzles; Logic & Aptitude Puzzles: Digital Logic Puzzles

classic-01: 9 Balls, 1 Heavier, 2 Weighings (E); classic-02: 2 Eggs and 100 Floors (M); classic-03: Burning Ropes to Measure 45 Minutes (M); classic-04: Measure 4 Liters with 3L and 5L Jugs (E); classic-05: Bridge and Torch (1, 2, 7, 10 Minutes) (M); classic-06: 100 Prisoners and One Light Switch (H); probability-01: Biased Coin to Fair Bit (Von Neumann) (M); probability-02: Expected Tosses Until First HH (M); probability-03: Two Children, At Least One Boy (E); probability-04: Monty Hall Switching Odds (M); probability-05: Birthday Collision Threshold (M); probability-06: Bayes on Failing Test Alerts (M); logic-01: Build XOR Using Only 2:1 MUXes (E); logic-02: One-Cycle Pulse Across Clock Domains (M); logic-03: Minimum NAND Gates for XOR (M); logic-04: Overlapping 1011 Sequence Detector (M); logic-05: Mod-6 Counter Behavior Check (M); logic-06: Metastability MTBF Improvement Estimate (M)

Day 3

Logic & Aptitude Puzzles: Debugging Riddles; Scenario & Debug Puzzles: Testbench Debug Puzzles: Why Did the Test Hang?; Scenario & Debug Puzzles: Deadlock Scenario Puzzles: Objection and Phase Stalls

debug-01: Race-Region Printout: What Does Each Monitor Print? (M); debug-02: Reset Release Leaves the FSM in an Illegal State (H); debug-03: always_comb with NBA and Missing Else (M); debug-04: UVM Analysis Port Handle Reuse (M); debug-05: join_any Timeout Ghost Thread (M); debug-06: Randomization Always Fails: Hidden Unsat (E); tb-001: Handshake Hang: Missing item_done on One Branch (M); tb-002: Missing run_phase Objection in Test (E); tb-003: Wrong Phase: Starting Traffic in shutdown_phase (M); tb-004: Handshake Violation: item_done Called Twice (M); tb-005: Sequence get_response Stall (M); tb-006: Virtual Sequence Waits on an Event That Already Fired (M); dead-001: Early Return Leaves Objection Raised (E); dead-002: Background Poller Keeps Running After Traffic Ends (M); dead-003: Semaphore Token Leak on Error Path (E); dead-004: join_any Ends the Task with the Mailbox Full (M); dead-005: Lock Inversion with Two Semaphores (M); dead-006: disable fork Kills the Thread That Owned the Drop (H)

Day 4

Scenario & Debug Puzzles: Scoreboard Puzzles: Mismatch or Ordering Bug?; Scenario & Debug Puzzles: Real Interview Rounds: End-to-End Debug Walkthrough; UVM Testbench Puzzles: UVM Phases and Objections

sb-001: Out-of-Order Responses Miscompared as Corruption (M); sb-002: Missing First Transaction After Reset (M); sb-003: Duplicate Transactions from Handle Reuse (E); sb-004: Mismatch Cascade After One Lost Item (M); sb-005: End-of-Test Draining Missing (M); sb-006: Duplicate Expected Entries from Predictor Retry Path (M); round-001: Round: Mid-Test Reset Hangs the Regression (M); round-002: Round Walkthrough: Objection Deadlock with Clean Waves (H); round-003: Round Walkthrough: APB Reads Return Previous Data (M); round-004: Round: Sequencer Grants Nothing After lock() (H); round-005: Round: Scoreboard Deadlock Through Bounded Mailboxes (H); round-006: Round: Drain Timeout That Never Fires (H); uvm-phase-01: Which Way Do the Phases Walk the Tree (E); uvm-phase-02: Drain Time After the Last Drop (M); uvm-phase-03: PASSED Banner Printed Before the Error (M); uvm-phase-04: Derived build_phase Without super (E); uvm-phase-05: phase_ready_to_end Never Extends (H); uvm-phase-06: Creating a Component After Build (M)

Day 5 (review)

Functional Coverage Puzzles Q&A; Logic & Aptitude Puzzles Q&A; Scenario & Debug Puzzles Q&A; UVM Testbench Puzzles Q&A; Testbench Hang; Constraint No-Solution; Vacuous Assertion Pass; Re-do misses from weeks 1 to 3.

Re-do misses